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Post Quantum ECC on FPGA Platform
ECC Post -Quantum FPGA
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2019/5/28
Post-quantum cryptography has gathered significant attention in recent times due to the NIST call for standardization of quantum resistant public key algorithms. In that context, supersingular isogeny...
A Novel FPGA Architecture and Protocol for the Self-attestation of Configurable Hardware
FPGA configurable hardware remote attestation
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2019/4/23
Field-Programmable Gate Arrays or FPGAs are popular platforms for hardware-based attestation. They offer protection against physical and remote attacks by verifying if an embedded processor is running...
The effort in reducing the area of AES implementations has largely been focused on Application-Specific Integrated Circuits (ASICs) in which a tower field construction leads to a small design of the A...
FPGA-based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data
FV homomorphic encryption latticebased cryptography polynomial multiplication
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2019/2/25
Homomorphic encryption is a tool that enables computation on encrypted data and thus has applications in privacy-preserving cloud computing. Though conceptually amazing, implementation of homomorphic ...
FPGA-based Assessment of Midori and GIFT Lightweight Block Ciphers
Lightweight cryptography PRESENT
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2018/11/5
Lightweight block ciphers are today of paramount importance to provide security services in constrained environments. Recent studies have questioned the security properties of PRESENT, which makes it ...
An FPGA-based programmable processor for bilinear pairings
public-key cryptography implementation applications
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2018/11/2
Bilinear pairings on elliptic curves are an active research field in cryptography. First cryptographic protocols based on bilinear pairings were proposed by the year 2000 and they are promising soluti...
In this paper a ‘FPGA cluster’ based framework for high performance Cryptanalysis has been proposed. The framework abstracts underlying networked FPGA cluster into a unified acceleration resource. It ...
Verification of FPGA-augmented trusted computing mechanisms based on Applied Pi Calculus
implementation Trusted Computing
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2018/1/2
Trusted computing technologies may play a key role for cloud security as they enable users to relax the trustworthiness assumptions about the provider that operates the physical cloud infrastructure. ...
FPGA-based Niederreiter Cryptosystem using Binary Goppa Codes
post-quantum cryptography code-based cryptography Niederreiter cryptosystem
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2017/12/11
This paper presents an FPGA implementation of the Niederreiter cryptosystem using binary Goppa codes, including modules for encryption, decryption, and key generation. We improve over previous impleme...
Looting the LUTs : FPGA Optimization of AES and AES-like Ciphers for Authenticated Encryption
AES FPGA Authenticated Encryption
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2017/10/25
In this paper, we investigate the efficiency of FPGA implementations of AES and AES-like ciphers, specially in the context of authenticated encryption. We consider the encryption/decryption and the au...
Fast FPGA Implementations of Diffie-Hellman on the Kummer Surface of a Genus-2 Curve
Diffie-Hellman key exchange hyperelliptic curve cryptography Kummer surface
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2017/9/1
We present the first hardware implementations of Diffie-Hellman key exchange based on the Kummer surface of Gaudry and Schost's genus-22 curve targeting a 128128-bit security level. We describe a sing...
How to Break Secure Boot on FPGA SoCs through Malicious Hardware
FPGA SoCs secure boot hardware design
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2017/6/28
Embedded IoT devices are often built upon large system on chip computing platforms running a significant stack of software. For certain computation-intensive operations such as signal processing or en...
FPGA-based Key Generator for the Niederreiter Cryptosystem using Binary Goppa Codes
post-quantum cryptography code-based cryptography Niederreiter key generation
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2017/6/22
This paper presents an post-quantum secure, efficient, and tunable FPGA implementation of the key generation algorithm for the Niederreiter cryptosystem using binary Goppa codes. Our key generator imp...
SafeDRP: Yet Another Way Toward Power-Equalized Designs in FPGA
FPGA Side-channel analysis attacks
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2017/3/31
Side-channel analysis attacks, particularly power analysis attacks, have become one of the major threats, that hardware designers have to deal with. To defeat them, the majority of the known concepts ...
Dissecting Leakage Resilient PRFs with Multivariate Localized EM Attacks - A Practical Security Evaluation on FPGA
AES side-channel attack localized EM measurements
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2017/3/27
In leakage-resilient symmetric cryptography, two important concepts have been proposed in order to decrease the success rate of differential side-channel attacks. The first one is to limit the attacke...